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<a href="#nested-classes">Data Structures</a> &#124;
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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_ipi_psu___target.html">XIpiPsu_Target</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data structure used to refer IPI Targets.  <a href="struct_x_ipi_psu___target.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_ipi_psu___config.html">XIpiPsu_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for the device.  <a href="struct_x_ipi_psu___config.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_ipi_psu.html">XIpiPsu</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_ipi_psu.html" title="The XIpiPsu driver instance data. ">XIpiPsu</a> driver instance data.  <a href="struct_x_ipi_psu.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:gaad130b0ac7cc7a948fa636e7a2000bed"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#gaad130b0ac7cc7a948fa636e7a2000bed">XIPIPSU_BUF_TYPE_MSG</a>&#160;&#160;&#160;(0x001U)</td></tr>
<tr class="memdesc:gaad130b0ac7cc7a948fa636e7a2000bed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Message type buffer.  <a href="#gaad130b0ac7cc7a948fa636e7a2000bed">More...</a><br/></td></tr>
<tr class="separator:gaad130b0ac7cc7a948fa636e7a2000bed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad0b378b86976236e743f8a75ed9f8d8d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#gad0b378b86976236e743f8a75ed9f8d8d">XIPIPSU_BUF_TYPE_RESP</a>&#160;&#160;&#160;(0x002U)</td></tr>
<tr class="memdesc:gad0b378b86976236e743f8a75ed9f8d8d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Response buffer.  <a href="#gad0b378b86976236e743f8a75ed9f8d8d">More...</a><br/></td></tr>
<tr class="separator:gad0b378b86976236e743f8a75ed9f8d8d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0b65ba4c02df42fe764615f99546fa56"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#ga0b65ba4c02df42fe764615f99546fa56">XIPIPSU_CRC_INDEX</a>&#160;&#160;&#160;(0x7U)</td></tr>
<tr class="memdesc:ga0b65ba4c02df42fe764615f99546fa56"><td class="mdescLeft">&#160;</td><td class="mdescRight">Index where the CRC is stored.  <a href="#ga0b65ba4c02df42fe764615f99546fa56">More...</a><br/></td></tr>
<tr class="separator:ga0b65ba4c02df42fe764615f99546fa56"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga60f742faef33529c730b02614441789b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#ga60f742faef33529c730b02614441789b">XIPIPSU_W0_TO_W6_SIZE</a>&#160;&#160;&#160;(28U)</td></tr>
<tr class="memdesc:ga60f742faef33529c730b02614441789b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Size of the word 0 to word 6.  <a href="#ga60f742faef33529c730b02614441789b">More...</a><br/></td></tr>
<tr class="separator:ga60f742faef33529c730b02614441789b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac57efc54862ee5bea23a3e217388a2dc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#gac57efc54862ee5bea23a3e217388a2dc">XIPIPSU_CRC_ERROR</a>&#160;&#160;&#160;(0xFL)</td></tr>
<tr class="memdesc:gac57efc54862ee5bea23a3e217388a2dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">CRC error occurred.  <a href="#gac57efc54862ee5bea23a3e217388a2dc">More...</a><br/></td></tr>
<tr class="separator:gac57efc54862ee5bea23a3e217388a2dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2d1f1a28e0f7355b25520ccb9ff0a77b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#ga2d1f1a28e0f7355b25520ccb9ff0a77b">ENABLE_IPI_CRC_VAL</a>&#160;&#160;&#160;(0x0U)</td></tr>
<tr class="memdesc:ga2d1f1a28e0f7355b25520ccb9ff0a77b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable CRC.  <a href="#ga2d1f1a28e0f7355b25520ccb9ff0a77b">More...</a><br/></td></tr>
<tr class="separator:ga2d1f1a28e0f7355b25520ccb9ff0a77b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6191e58907dea92be1f8fd83a2673be8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#ga6191e58907dea92be1f8fd83a2673be8">XIPIPSU_MAX_MSG_LEN</a>&#160;&#160;&#160;<a class="el" href="group__ipipsu__api.html#ga5989f697e24f79be32727d13ee3f4350">XIPIPSU_MSG_BUF_SIZE</a></td></tr>
<tr class="memdesc:ga6191e58907dea92be1f8fd83a2673be8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum message length.  <a href="#ga6191e58907dea92be1f8fd83a2673be8">More...</a><br/></td></tr>
<tr class="separator:ga6191e58907dea92be1f8fd83a2673be8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac400a6861c1d0ee565ad5fac914a7220"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#gac400a6861c1d0ee565ad5fac914a7220">XIpiPsu_ReadReg</a>(BaseAddress, RegOffset)&#160;&#160;&#160;Xil_In32((BaseAddress) + (RegOffset))</td></tr>
<tr class="memdesc:gac400a6861c1d0ee565ad5fac914a7220"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reads the register specified by the base address and offset.  <a href="#gac400a6861c1d0ee565ad5fac914a7220">More...</a><br/></td></tr>
<tr class="separator:gac400a6861c1d0ee565ad5fac914a7220"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga72bcaac2f32ad480f79204f868309c31"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#ga72bcaac2f32ad480f79204f868309c31">XIpiPsu_WriteReg</a>(BaseAddress, RegOffset, Data)&#160;&#160;&#160;Xil_Out32(((BaseAddress) + (RegOffset)), (Data))</td></tr>
<tr class="memdesc:ga72bcaac2f32ad480f79204f868309c31"><td class="mdescLeft">&#160;</td><td class="mdescRight">Writes a value into a register specified by base address and offset.  <a href="#ga72bcaac2f32ad480f79204f868309c31">More...</a><br/></td></tr>
<tr class="separator:ga72bcaac2f32ad480f79204f868309c31"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa4e2694e0d28168f195f87583a34190c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#gaa4e2694e0d28168f195f87583a34190c">XIpiPsu_InterruptEnable</a>(InstancePtr, Mask)</td></tr>
<tr class="memdesc:gaa4e2694e0d28168f195f87583a34190c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable interrupts specified in <em>Mask</em>.  <a href="#gaa4e2694e0d28168f195f87583a34190c">More...</a><br/></td></tr>
<tr class="separator:gaa4e2694e0d28168f195f87583a34190c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad78cbbfba9e09be384e1fbe733f3dc12"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#gad78cbbfba9e09be384e1fbe733f3dc12">XIpiPsu_InterruptDisable</a>(InstancePtr, Mask)</td></tr>
<tr class="memdesc:gad78cbbfba9e09be384e1fbe733f3dc12"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable interrupts specified in <em>Mask</em>.  <a href="#gad78cbbfba9e09be384e1fbe733f3dc12">More...</a><br/></td></tr>
<tr class="separator:gad78cbbfba9e09be384e1fbe733f3dc12"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5b24a8f18c8abc17b7a26532da88cc7e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#ga5b24a8f18c8abc17b7a26532da88cc7e">XIpiPsu_GetInterruptStatus</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga5b24a8f18c8abc17b7a26532da88cc7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets the <em>STATUS REGISTER</em> of the current IPI instance.  <a href="#ga5b24a8f18c8abc17b7a26532da88cc7e">More...</a><br/></td></tr>
<tr class="separator:ga5b24a8f18c8abc17b7a26532da88cc7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2919c49f2a05d552dedb148069e84045"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#ga2919c49f2a05d552dedb148069e84045">XIpiPsu_ClearInterruptStatus</a>(InstancePtr, Mask)</td></tr>
<tr class="memdesc:ga2919c49f2a05d552dedb148069e84045"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clears the <em>STATUS REGISTER</em> of the current IPI instance.  <a href="#ga2919c49f2a05d552dedb148069e84045">More...</a><br/></td></tr>
<tr class="separator:ga2919c49f2a05d552dedb148069e84045"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4a62cac5d53ded4028a5f1586e390645"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#ga4a62cac5d53ded4028a5f1586e390645">XIpiPsu_GetObsStatus</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga4a62cac5d53ded4028a5f1586e390645"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets the <em>OBSERVATION REGISTER</em> of the current IPI instance.  <a href="#ga4a62cac5d53ded4028a5f1586e390645">More...</a><br/></td></tr>
<tr class="separator:ga4a62cac5d53ded4028a5f1586e390645"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga156d31f0b6ec62b917d9ce4a2d3684e3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_ipi_psu___config.html">XIpiPsu_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#ga156d31f0b6ec62b917d9ce4a2d3684e3">XIpiPsu_LookupConfig</a> (u32 DeviceId)</td></tr>
<tr class="memdesc:ga156d31f0b6ec62b917d9ce4a2d3684e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Looks up the device configuration based on the unique device ID.  <a href="#ga156d31f0b6ec62b917d9ce4a2d3684e3">More...</a><br/></td></tr>
<tr class="separator:ga156d31f0b6ec62b917d9ce4a2d3684e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9fb4494480ae0079422956f2af1da357"><td class="memItemLeft" align="right" valign="top">XStatus&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#ga9fb4494480ae0079422956f2af1da357">XIpiPsu_CfgInitialize</a> (<a class="el" href="struct_x_ipi_psu.html">XIpiPsu</a> *InstancePtr, <a class="el" href="struct_x_ipi_psu___config.html">XIpiPsu_Config</a> *CfgPtr, UINTPTR EffectiveAddress)</td></tr>
<tr class="memdesc:ga9fb4494480ae0079422956f2af1da357"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initializes the Instance pointer based on a given Config Pointer.  <a href="#ga9fb4494480ae0079422956f2af1da357">More...</a><br/></td></tr>
<tr class="separator:ga9fb4494480ae0079422956f2af1da357"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9c55b8deb0e6b0a4ff355ad3a74aa2f1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#ga9c55b8deb0e6b0a4ff355ad3a74aa2f1">XIpiPsu_Reset</a> (<a class="el" href="struct_x_ipi_psu.html">XIpiPsu</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga9c55b8deb0e6b0a4ff355ad3a74aa2f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Resets the given IPI register set.  <a href="#ga9c55b8deb0e6b0a4ff355ad3a74aa2f1">More...</a><br/></td></tr>
<tr class="separator:ga9c55b8deb0e6b0a4ff355ad3a74aa2f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8aa0005ec03abef3b3c1a506cb924e6e"><td class="memItemLeft" align="right" valign="top">XStatus&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#ga8aa0005ec03abef3b3c1a506cb924e6e">XIpiPsu_TriggerIpi</a> (<a class="el" href="struct_x_ipi_psu.html">XIpiPsu</a> *InstancePtr, u32 DestCpuMask)</td></tr>
<tr class="memdesc:ga8aa0005ec03abef3b3c1a506cb924e6e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Triggers an IPI to a Destination CPU.  <a href="#ga8aa0005ec03abef3b3c1a506cb924e6e">More...</a><br/></td></tr>
<tr class="separator:ga8aa0005ec03abef3b3c1a506cb924e6e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8153ea7257d7db9dd3f2ac0dd03e2ee2"><td class="memItemLeft" align="right" valign="top">XStatus&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#ga8153ea7257d7db9dd3f2ac0dd03e2ee2">XIpiPsu_PollForAck</a> (const <a class="el" href="struct_x_ipi_psu.html">XIpiPsu</a> *InstancePtr, u32 DestCpuMask, u32 TimeOutCount)</td></tr>
<tr class="memdesc:ga8153ea7257d7db9dd3f2ac0dd03e2ee2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Polls for an acknowledgement using Observation Register.  <a href="#ga8153ea7257d7db9dd3f2ac0dd03e2ee2">More...</a><br/></td></tr>
<tr class="separator:ga8153ea7257d7db9dd3f2ac0dd03e2ee2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga64113249dac23760b5cc0e9d038f8361"><td class="memItemLeft" align="right" valign="top">XStatus&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#ga64113249dac23760b5cc0e9d038f8361">XIpiPsu_ReadMessage</a> (<a class="el" href="struct_x_ipi_psu.html">XIpiPsu</a> *InstancePtr, u32 SrcCpuMask, u32 *MsgPtr, u32 MsgLength, u8 BufferType)</td></tr>
<tr class="memdesc:ga64113249dac23760b5cc0e9d038f8361"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read an Incoming Message from a Source.  <a href="#ga64113249dac23760b5cc0e9d038f8361">More...</a><br/></td></tr>
<tr class="separator:ga64113249dac23760b5cc0e9d038f8361"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga429d934e93e38c71d92ad98775b9cd92"><td class="memItemLeft" align="right" valign="top">XStatus&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#ga429d934e93e38c71d92ad98775b9cd92">XIpiPsu_WriteMessage</a> (<a class="el" href="struct_x_ipi_psu.html">XIpiPsu</a> *InstancePtr, u32 DestCpuMask, const u32 *MsgPtr, u32 MsgLength, u8 BufferType)</td></tr>
<tr class="memdesc:ga429d934e93e38c71d92ad98775b9cd92"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sends a Message to Destination.  <a href="#ga429d934e93e38c71d92ad98775b9cd92">More...</a><br/></td></tr>
<tr class="separator:ga429d934e93e38c71d92ad98775b9cd92"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab4466706c8ede1b9b6e5b592a075afa7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#gab4466706c8ede1b9b6e5b592a075afa7">XIpiPsu_SetConfigTable</a> (u32 DeviceId, <a class="el" href="struct_x_ipi_psu___config.html">XIpiPsu_Config</a> *ConfigTblPtr)</td></tr>
<tr class="memdesc:gab4466706c8ede1b9b6e5b592a075afa7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets up the device configuration based on the unique device ID.  <a href="#gab4466706c8ede1b9b6e5b592a075afa7">More...</a><br/></td></tr>
<tr class="separator:gab4466706c8ede1b9b6e5b592a075afa7"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Variables</h2></td></tr>
<tr class="memitem:gaf954c1864f8c4c66c0a887d8868cbc3e"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_ipi_psu___config.html">XIpiPsu_Config</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ipipsu.html#gaf954c1864f8c4c66c0a887d8868cbc3e">XIpiPsu_ConfigTable</a> [XPAR_XIPIPSU_NUM_INSTANCES]</td></tr>
<tr class="memdesc:gaf954c1864f8c4c66c0a887d8868cbc3e"><td class="mdescLeft">&#160;</td><td class="mdescRight">The IPIPSU configuration table, sized by the number of instances defined in xparameters.h.  <a href="#gaf954c1864f8c4c66c0a887d8868cbc3e">More...</a><br/></td></tr>
<tr class="separator:gaf954c1864f8c4c66c0a887d8868cbc3e"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<h2 class="groupheader">Macro Definition Documentation</h2>
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          <td class="memname">#define ENABLE_IPI_CRC_VAL&#160;&#160;&#160;(0x0U)</td>
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<p>Enable CRC. </p>

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          <td class="memname">#define XIPIPSU_BUF_TYPE_MSG&#160;&#160;&#160;(0x001U)</td>
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<p>Message type buffer. </p>

<p>Referenced by <a class="el" href="xipipsu__self__test__example_8c.html#a2dc7058c8f10506fd4279462d399d33a">IpiIntrHandler()</a>, and <a class="el" href="group__ipipsu__api.html#ga1404a6dc6d1ff0a6baf80a74e6bdb6e5">XIpiPsu_GetBufferAddress()</a>.</p>

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          <td class="memname">#define XIPIPSU_BUF_TYPE_RESP&#160;&#160;&#160;(0x002U)</td>
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<p>Response buffer. </p>

<p>Referenced by <a class="el" href="xipipsu__self__test__example_8c.html#a2dc7058c8f10506fd4279462d399d33a">IpiIntrHandler()</a>, and <a class="el" href="group__ipipsu__api.html#ga1404a6dc6d1ff0a6baf80a74e6bdb6e5">XIpiPsu_GetBufferAddress()</a>.</p>

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          <td class="memname">#define XIpiPsu_ClearInterruptStatus</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Mask&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__ipipsu.html#ga72bcaac2f32ad480f79204f868309c31">XIpiPsu_WriteReg</a>((InstancePtr)-&gt;Config.BaseAddress, \</div>
<div class="line">                         <a class="code" href="group__ipipsu__api.html#ga5c9abd1d0247d6b28268131d90b62a05">XIPIPSU_ISR_OFFSET</a>, \</div>
<div class="line">                         ((Mask) &amp; <a class="code" href="group__ipipsu__api.html#ga708ab6017d3971d9f9c0bf052fcdfd2f">XIPIPSU_ALL_MASK</a>));</div>
<div class="ttc" id="group__ipipsu_html_ga72bcaac2f32ad480f79204f868309c31"><div class="ttname"><a href="group__ipipsu.html#ga72bcaac2f32ad480f79204f868309c31">XIpiPsu_WriteReg</a></div><div class="ttdeci">#define XIpiPsu_WriteReg(BaseAddress, RegOffset, Data)</div><div class="ttdoc">Writes a value into a register specified by base address and offset. </div><div class="ttdef"><b>Definition:</b> xipipsu.h:199</div></div>
<div class="ttc" id="group__ipipsu__api_html_ga708ab6017d3971d9f9c0bf052fcdfd2f"><div class="ttname"><a href="group__ipipsu__api.html#ga708ab6017d3971d9f9c0bf052fcdfd2f">XIPIPSU_ALL_MASK</a></div><div class="ttdeci">#define XIPIPSU_ALL_MASK</div><div class="ttdoc">All valid bit mask. </div><div class="ttdef"><b>Definition:</b> xipipsu_hw.h:93</div></div>
<div class="ttc" id="group__ipipsu__api_html_ga5c9abd1d0247d6b28268131d90b62a05"><div class="ttname"><a href="group__ipipsu__api.html#ga5c9abd1d0247d6b28268131d90b62a05">XIPIPSU_ISR_OFFSET</a></div><div class="ttdeci">#define XIPIPSU_ISR_OFFSET</div><div class="ttdoc">Offset for ISR register. </div><div class="ttdef"><b>Definition:</b> xipipsu_hw.h:73</div></div>
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<p>Clears the <em>STATUS REGISTER</em> of the current IPI instance. </p>
<p>The corresponding interrupt status for each bit set to 1 in <em>Mask</em> is cleared.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the instance to be worked on. </td></tr>
    <tr><td class="paramname">Mask</td><td>Mask corresponding to the source CPU*</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>This function should be used after handling the IPI. Clearing the status will automatically clear the corresponding bit in OBSERVATION register of Source CPU C-style signature void <a class="el" href="group__ipipsu.html#ga2919c49f2a05d552dedb148069e84045" title="Clears the STATUS REGISTER of the current IPI instance. ">XIpiPsu_ClearInterruptStatus(XIpiPsu *InstancePtr, u32 Mask)</a> </dd></dl>

<p>Referenced by <a class="el" href="xipipsu__self__test__example_8c.html#a2dc7058c8f10506fd4279462d399d33a">IpiIntrHandler()</a>, and <a class="el" href="xipipsu__self__test__example_8c.html#ae66f6b31b5ad750f1fe042a706a4e3d4">main()</a>.</p>

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          <td class="memname">#define XIPIPSU_CRC_ERROR&#160;&#160;&#160;(0xFL)</td>
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<p>CRC error occurred. </p>

<p>Referenced by <a class="el" href="group__ipipsu.html#ga64113249dac23760b5cc0e9d038f8361">XIpiPsu_ReadMessage()</a>.</p>

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<a class="anchor" id="ga0b65ba4c02df42fe764615f99546fa56"></a>
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          <td class="memname">#define XIPIPSU_CRC_INDEX&#160;&#160;&#160;(0x7U)</td>
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<p>Index where the CRC is stored. </p>

<p>Referenced by <a class="el" href="group__ipipsu.html#ga64113249dac23760b5cc0e9d038f8361">XIpiPsu_ReadMessage()</a>, and <a class="el" href="group__ipipsu.html#ga429d934e93e38c71d92ad98775b9cd92">XIpiPsu_WriteMessage()</a>.</p>

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          <td class="memname">#define XIpiPsu_GetInterruptStatus</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
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<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__ipipsu.html#gac400a6861c1d0ee565ad5fac914a7220">XIpiPsu_ReadReg</a>((InstancePtr)-&gt;Config.BaseAddress, \</div>
<div class="line">                        <a class="code" href="group__ipipsu__api.html#ga5c9abd1d0247d6b28268131d90b62a05">XIPIPSU_ISR_OFFSET</a>)</div>
<div class="ttc" id="group__ipipsu__api_html_ga5c9abd1d0247d6b28268131d90b62a05"><div class="ttname"><a href="group__ipipsu__api.html#ga5c9abd1d0247d6b28268131d90b62a05">XIPIPSU_ISR_OFFSET</a></div><div class="ttdeci">#define XIPIPSU_ISR_OFFSET</div><div class="ttdoc">Offset for ISR register. </div><div class="ttdef"><b>Definition:</b> xipipsu_hw.h:73</div></div>
<div class="ttc" id="group__ipipsu_html_gac400a6861c1d0ee565ad5fac914a7220"><div class="ttname"><a href="group__ipipsu.html#gac400a6861c1d0ee565ad5fac914a7220">XIpiPsu_ReadReg</a></div><div class="ttdeci">#define XIpiPsu_ReadReg(BaseAddress, RegOffset)</div><div class="ttdoc">Reads the register specified by the base address and offset. </div><div class="ttdef"><b>Definition:</b> xipipsu.h:181</div></div>
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<p>Gets the <em>STATUS REGISTER</em> of the current IPI instance. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the instance to be worked on. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Returns the Interrupt Status register(ISR) contents </dd></dl>
<dl class="section note"><dt>Note</dt><dd>User needs to parse this 32-bit value to check the source CPU C-style signature u32 <a class="el" href="group__ipipsu.html#ga5b24a8f18c8abc17b7a26532da88cc7e" title="Gets the STATUS REGISTER of the current IPI instance. ">XIpiPsu_GetInterruptStatus(XIpiPsu *InstancePtr)</a> </dd></dl>

<p>Referenced by <a class="el" href="xipipsu__self__test__example_8c.html#a2dc7058c8f10506fd4279462d399d33a">IpiIntrHandler()</a>.</p>

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          <td class="memname">#define XIpiPsu_GetObsStatus</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
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<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__ipipsu.html#gac400a6861c1d0ee565ad5fac914a7220">XIpiPsu_ReadReg</a>((InstancePtr)-&gt;Config.BaseAddress, \</div>
<div class="line">                        <a class="code" href="group__ipipsu__api.html#ga1ca8515703f72eb2194a408cfa5b4a18">XIPIPSU_OBS_OFFSET</a>)</div>
<div class="ttc" id="group__ipipsu__api_html_ga1ca8515703f72eb2194a408cfa5b4a18"><div class="ttname"><a href="group__ipipsu__api.html#ga1ca8515703f72eb2194a408cfa5b4a18">XIPIPSU_OBS_OFFSET</a></div><div class="ttdeci">#define XIPIPSU_OBS_OFFSET</div><div class="ttdoc">Offset for Observation register. </div><div class="ttdef"><b>Definition:</b> xipipsu_hw.h:72</div></div>
<div class="ttc" id="group__ipipsu_html_gac400a6861c1d0ee565ad5fac914a7220"><div class="ttname"><a href="group__ipipsu.html#gac400a6861c1d0ee565ad5fac914a7220">XIpiPsu_ReadReg</a></div><div class="ttdeci">#define XIpiPsu_ReadReg(BaseAddress, RegOffset)</div><div class="ttdoc">Reads the register specified by the base address and offset. </div><div class="ttdef"><b>Definition:</b> xipipsu.h:181</div></div>
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<p>Gets the <em>OBSERVATION REGISTER</em> of the current IPI instance. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the instance to be worked on. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Returns the Observation register(OBS) contents </dd></dl>
<dl class="section note"><dt>Note</dt><dd>User needs to parse this 32-bit value to check the status of individual CPUs C-style signature u32 <a class="el" href="group__ipipsu.html#ga4a62cac5d53ded4028a5f1586e390645" title="Gets the OBSERVATION REGISTER of the current IPI instance. ">XIpiPsu_GetObsStatus(XIpiPsu *InstancePtr)</a> </dd></dl>

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          <td class="memname">#define XIpiPsu_InterruptDisable</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Mask&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__ipipsu.html#ga72bcaac2f32ad480f79204f868309c31">XIpiPsu_WriteReg</a>((InstancePtr)-&gt;Config.BaseAddress, \</div>
<div class="line">                         <a class="code" href="group__ipipsu__api.html#ga81c99cede6902a231b207281d9a6e212">XIPIPSU_IDR_OFFSET</a>, \</div>
<div class="line">                         ((Mask) &amp; <a class="code" href="group__ipipsu__api.html#ga708ab6017d3971d9f9c0bf052fcdfd2f">XIPIPSU_ALL_MASK</a>));</div>
<div class="ttc" id="group__ipipsu__api_html_ga81c99cede6902a231b207281d9a6e212"><div class="ttname"><a href="group__ipipsu__api.html#ga81c99cede6902a231b207281d9a6e212">XIPIPSU_IDR_OFFSET</a></div><div class="ttdeci">#define XIPIPSU_IDR_OFFSET</div><div class="ttdoc">Offset for Interrupt Disable Register. </div><div class="ttdef"><b>Definition:</b> xipipsu_hw.h:76</div></div>
<div class="ttc" id="group__ipipsu_html_ga72bcaac2f32ad480f79204f868309c31"><div class="ttname"><a href="group__ipipsu.html#ga72bcaac2f32ad480f79204f868309c31">XIpiPsu_WriteReg</a></div><div class="ttdeci">#define XIpiPsu_WriteReg(BaseAddress, RegOffset, Data)</div><div class="ttdoc">Writes a value into a register specified by base address and offset. </div><div class="ttdef"><b>Definition:</b> xipipsu.h:199</div></div>
<div class="ttc" id="group__ipipsu__api_html_ga708ab6017d3971d9f9c0bf052fcdfd2f"><div class="ttname"><a href="group__ipipsu__api.html#ga708ab6017d3971d9f9c0bf052fcdfd2f">XIPIPSU_ALL_MASK</a></div><div class="ttdeci">#define XIPIPSU_ALL_MASK</div><div class="ttdoc">All valid bit mask. </div><div class="ttdef"><b>Definition:</b> xipipsu_hw.h:93</div></div>
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<p>Disable interrupts specified in <em>Mask</em>. </p>
<p>The corresponding interrupt for each bit set to 1 in <em>Mask</em>, will be disabled.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the instance to be worked on. </td></tr>
    <tr><td class="paramname">Mask</td><td>Contains a bit mask of interrupts to disable. The mask can be formed using a set of bitwise or'd values of individual CPU masks</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature void <a class="el" href="group__ipipsu.html#gad78cbbfba9e09be384e1fbe733f3dc12" title="Disable interrupts specified in Mask. ">XIpiPsu_InterruptDisable(XIpiPsu *InstancePtr, u32 Mask)</a> </dd></dl>

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          <td class="memname">#define XIpiPsu_InterruptEnable</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Mask&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__ipipsu.html#ga72bcaac2f32ad480f79204f868309c31">XIpiPsu_WriteReg</a>((InstancePtr)-&gt;Config.BaseAddress, \</div>
<div class="line">                         <a class="code" href="group__ipipsu__api.html#gab20d7be8c5dd6ca941862eb1ff40289d">XIPIPSU_IER_OFFSET</a>, \</div>
<div class="line">                         ((Mask) &amp; <a class="code" href="group__ipipsu__api.html#ga708ab6017d3971d9f9c0bf052fcdfd2f">XIPIPSU_ALL_MASK</a>));</div>
<div class="ttc" id="group__ipipsu_html_ga72bcaac2f32ad480f79204f868309c31"><div class="ttname"><a href="group__ipipsu.html#ga72bcaac2f32ad480f79204f868309c31">XIpiPsu_WriteReg</a></div><div class="ttdeci">#define XIpiPsu_WriteReg(BaseAddress, RegOffset, Data)</div><div class="ttdoc">Writes a value into a register specified by base address and offset. </div><div class="ttdef"><b>Definition:</b> xipipsu.h:199</div></div>
<div class="ttc" id="group__ipipsu__api_html_ga708ab6017d3971d9f9c0bf052fcdfd2f"><div class="ttname"><a href="group__ipipsu__api.html#ga708ab6017d3971d9f9c0bf052fcdfd2f">XIPIPSU_ALL_MASK</a></div><div class="ttdeci">#define XIPIPSU_ALL_MASK</div><div class="ttdoc">All valid bit mask. </div><div class="ttdef"><b>Definition:</b> xipipsu_hw.h:93</div></div>
<div class="ttc" id="group__ipipsu__api_html_gab20d7be8c5dd6ca941862eb1ff40289d"><div class="ttname"><a href="group__ipipsu__api.html#gab20d7be8c5dd6ca941862eb1ff40289d">XIPIPSU_IER_OFFSET</a></div><div class="ttdeci">#define XIPIPSU_IER_OFFSET</div><div class="ttdoc">Offset for Interrupt Enable Register. </div><div class="ttdef"><b>Definition:</b> xipipsu_hw.h:75</div></div>
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<p>Enable interrupts specified in <em>Mask</em>. </p>
<p>The corresponding interrupt for each bit set to 1 in <em>Mask</em>, will be enabled.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the instance to be worked on. </td></tr>
    <tr><td class="paramname">Mask</td><td>Contains a bit mask of interrupts to enable. The mask can be formed using a set of bitwise or'd values of individual CPU masks</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature void <a class="el" href="group__ipipsu.html#gaa4e2694e0d28168f195f87583a34190c" title="Enable interrupts specified in Mask. ">XIpiPsu_InterruptEnable(XIpiPsu *InstancePtr, u32 Mask)</a> </dd></dl>

<p>Referenced by <a class="el" href="xipipsu__self__test__example_8c.html#ae66f6b31b5ad750f1fe042a706a4e3d4">main()</a>.</p>

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          <td class="memname">#define XIPIPSU_MAX_MSG_LEN&#160;&#160;&#160;<a class="el" href="group__ipipsu__api.html#ga5989f697e24f79be32727d13ee3f4350">XIPIPSU_MSG_BUF_SIZE</a></td>
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<p>Maximum message length. </p>

<p>Referenced by <a class="el" href="group__ipipsu.html#ga64113249dac23760b5cc0e9d038f8361">XIpiPsu_ReadMessage()</a>, and <a class="el" href="group__ipipsu.html#ga429d934e93e38c71d92ad98775b9cd92">XIpiPsu_WriteMessage()</a>.</p>

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          <td class="memname">#define XIpiPsu_ReadReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;Xil_In32((BaseAddress) + (RegOffset))</td>
        </tr>
      </table>
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<p>Reads the register specified by the base address and offset. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>Base address of the IPI instance </td></tr>
    <tr><td class="paramname">RegOffset</td><td>Offset of the register relative to base</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Value of the specified register </dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature u32 <a class="el" href="group__ipipsu.html#gac400a6861c1d0ee565ad5fac914a7220" title="Reads the register specified by the base address and offset. ">XIpiPsu_ReadReg(u32 BaseAddress, u32 RegOffset)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__ipipsu.html#ga8153ea7257d7db9dd3f2ac0dd03e2ee2">XIpiPsu_PollForAck()</a>.</p>

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          <td class="memname">#define XIPIPSU_W0_TO_W6_SIZE&#160;&#160;&#160;(28U)</td>
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<p>Size of the word 0 to word 6. </p>

<p>Referenced by <a class="el" href="group__ipipsu.html#ga64113249dac23760b5cc0e9d038f8361">XIpiPsu_ReadMessage()</a>, and <a class="el" href="group__ipipsu.html#ga429d934e93e38c71d92ad98775b9cd92">XIpiPsu_WriteMessage()</a>.</p>

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          <td class="memname">#define XIpiPsu_WriteReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Data&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;Xil_Out32(((BaseAddress) + (RegOffset)), (Data))</td>
        </tr>
      </table>
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<p>Writes a value into a register specified by base address and offset. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>Base address of the IPI instance </td></tr>
    <tr><td class="paramname">RegOffset</td><td>Offset of the register relative to base </td></tr>
    <tr><td class="paramname">Data</td><td>32-bit value that is to be written into the specified register</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature void <a class="el" href="group__ipipsu.html#ga72bcaac2f32ad480f79204f868309c31" title="Writes a value into a register specified by base address and offset. ">XIpiPsu_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__ipipsu.html#ga9c55b8deb0e6b0a4ff355ad3a74aa2f1">XIpiPsu_Reset()</a>, and <a class="el" href="group__ipipsu.html#ga8aa0005ec03abef3b3c1a506cb924e6e">XIpiPsu_TriggerIpi()</a>.</p>

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<h2 class="groupheader">Function Documentation</h2>
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          <td class="memname">XStatus XIpiPsu_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_ipi_psu.html">XIpiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_ipi_psu___config.html">XIpiPsu_Config</a> *&#160;</td>
          <td class="paramname"><em>CfgPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR&#160;</td>
          <td class="paramname"><em>EffectiveAddress</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Initializes the Instance pointer based on a given Config Pointer. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the instance to be worked on </td></tr>
    <tr><td class="paramname">CfgPtr</td><td>Device configuration structure containing required hardware build data </td></tr>
    <tr><td class="paramname">EffectiveAddress</td><td>Base address of the device. If address translation is not utilized, this parameter can be passed in using CfgPtr-&gt;Config. BaseAddress to specify the physical base address. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS if initialization was successful XST_FAILURE in case of failure </dd></dl>

<p>References <a class="el" href="struct_x_ipi_psu___config.html#a0d87ebd028051d4a05ab03410aadbc00">XIpiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_ipi_psu___config.html#a2057231c9bccf22dadbb50ae9ef93222">XIpiPsu_Config::BitMask</a>, <a class="el" href="struct_x_ipi_psu___target.html#ad8cf0011981eb538784e520195585e74">XIpiPsu_Target::BufferIndex</a>, <a class="el" href="struct_x_ipi_psu___config.html#a05cc5c627e65d8e37754913d0fc90470">XIpiPsu_Config::BufferIndex</a>, <a class="el" href="struct_x_ipi_psu.html#ad9074c920ef0af4db9ea831e463d65ad">XIpiPsu::Config</a>, <a class="el" href="struct_x_ipi_psu___config.html#a1ff848d153b0a8d32fa5a04396e1a89a">XIpiPsu_Config::DeviceId</a>, <a class="el" href="struct_x_ipi_psu___config.html#a3382d79fc242c571c9649aa91629689f">XIpiPsu_Config::IntId</a>, <a class="el" href="struct_x_ipi_psu.html#adefbfd74e9c2ee38710b9ed805504a68">XIpiPsu::IsReady</a>, <a class="el" href="struct_x_ipi_psu___target.html#a4ac80767ed4dcfd90d9a02db6a2a8eb4">XIpiPsu_Target::Mask</a>, <a class="el" href="struct_x_ipi_psu___config.html#a8df4537dada42c7a73d1072ad59d2626">XIpiPsu_Config::TargetCount</a>, and <a class="el" href="struct_x_ipi_psu___config.html#af7eb9b8148ebf278905b19dbd404b727">XIpiPsu_Config::TargetList</a>.</p>

<p>Referenced by <a class="el" href="xipipsu__self__test__example_8c.html#ae66f6b31b5ad750f1fe042a706a4e3d4">main()</a>.</p>

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          <td class="memname"><a class="el" href="struct_x_ipi_psu___config.html">XIpiPsu_Config</a>* XIpiPsu_LookupConfig </td>
          <td>(</td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>DeviceId</em></td><td>)</td>
          <td></td>
        </tr>
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<p>Looks up the device configuration based on the unique device ID. </p>
<p>A table contains the configuration information for each device in the system.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DeviceId</td><td>Contains the ID of the device to look up the configuration for.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A pointer to the configuration found or NULL if the specified device ID was not found. See <a class="el" href="xipipsu_8h.html">xipipsu.h</a> for the definition of <a class="el" href="struct_x_ipi_psu___config.html" title="This typedef contains configuration information for the device. ">XIpiPsu_Config</a>.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="group__ipipsu.html#gaf954c1864f8c4c66c0a887d8868cbc3e">XIpiPsu_ConfigTable</a>.</p>

<p>Referenced by <a class="el" href="xipipsu__self__test__example_8c.html#ae66f6b31b5ad750f1fe042a706a4e3d4">main()</a>.</p>

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          <td class="memname">XStatus XIpiPsu_PollForAck </td>
          <td>(</td>
          <td class="paramtype">const <a class="el" href="struct_x_ipi_psu.html">XIpiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>DestCpuMask</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>TimeOutCount</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Polls for an acknowledgement using Observation Register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to current IPI instance </td></tr>
    <tr><td class="paramname">DestCpuMask</td><td>Mask of the destination CPU from which ACK is expected </td></tr>
    <tr><td class="paramname">TimeOutCount</td><td>Count after which the routines returns failure</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS if successful XST_FAILURE if a timeout occurred </dd></dl>

<p>References <a class="el" href="struct_x_ipi_psu___config.html#a0d87ebd028051d4a05ab03410aadbc00">XIpiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_ipi_psu.html#ad9074c920ef0af4db9ea831e463d65ad">XIpiPsu::Config</a>, <a class="el" href="struct_x_ipi_psu.html#adefbfd74e9c2ee38710b9ed805504a68">XIpiPsu::IsReady</a>, <a class="el" href="group__ipipsu__api.html#ga1ca8515703f72eb2194a408cfa5b4a18">XIPIPSU_OBS_OFFSET</a>, and <a class="el" href="group__ipipsu.html#gac400a6861c1d0ee565ad5fac914a7220">XIpiPsu_ReadReg</a>.</p>

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          <td class="memname">XStatus XIpiPsu_ReadMessage </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_ipi_psu.html">XIpiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>SrcCpuMask</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32 *&#160;</td>
          <td class="paramname"><em>MsgPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>MsgLength</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>BufferType</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Read an Incoming Message from a Source. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to current IPI instance </td></tr>
    <tr><td class="paramname">SrcCpuMask</td><td>Device Mask for the CPU which has sent the message </td></tr>
    <tr><td class="paramname">MsgPtr</td><td>Pointer to Buffer to which the read message needs to be stored </td></tr>
    <tr><td class="paramname">MsgLength</td><td>Number of messages (each message is 4bytes) </td></tr>
    <tr><td class="paramname">BufferType</td><td>Type of buffer (XIPIPSU_BUF_TYPE_MSG or XIPIPSU_BUF_TYPE_RESP)</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS if successful XST_FAILURE if an error occurred </dd></dl>

<p>References <a class="el" href="struct_x_ipi_psu___config.html#a2057231c9bccf22dadbb50ae9ef93222">XIpiPsu_Config::BitMask</a>, <a class="el" href="struct_x_ipi_psu.html#ad9074c920ef0af4db9ea831e463d65ad">XIpiPsu::Config</a>, <a class="el" href="struct_x_ipi_psu.html#adefbfd74e9c2ee38710b9ed805504a68">XIpiPsu::IsReady</a>, <a class="el" href="group__ipipsu.html#gac57efc54862ee5bea23a3e217388a2dc">XIPIPSU_CRC_ERROR</a>, <a class="el" href="group__ipipsu.html#ga0b65ba4c02df42fe764615f99546fa56">XIPIPSU_CRC_INDEX</a>, <a class="el" href="group__ipipsu__api.html#ga1404a6dc6d1ff0a6baf80a74e6bdb6e5">XIpiPsu_GetBufferAddress()</a>, <a class="el" href="group__ipipsu.html#ga6191e58907dea92be1f8fd83a2673be8">XIPIPSU_MAX_MSG_LEN</a>, and <a class="el" href="group__ipipsu.html#ga60f742faef33529c730b02614441789b">XIPIPSU_W0_TO_W6_SIZE</a>.</p>

<p>Referenced by <a class="el" href="xipipsu__self__test__example_8c.html#a2dc7058c8f10506fd4279462d399d33a">IpiIntrHandler()</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_ipi_psu.html">XIpiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>Resets the given IPI register set. </p>
<pre class="fragment">    This function can be called to disable the IPIs from all
    the sources and clear any pending IPIs in status register
</pre><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to current IPI instance </td></tr>
  </table>
  </dd>
</dl>

<p>References <a class="el" href="struct_x_ipi_psu___config.html#a0d87ebd028051d4a05ab03410aadbc00">XIpiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_ipi_psu.html#ad9074c920ef0af4db9ea831e463d65ad">XIpiPsu::Config</a>, <a class="el" href="struct_x_ipi_psu.html#adefbfd74e9c2ee38710b9ed805504a68">XIpiPsu::IsReady</a>, <a class="el" href="group__ipipsu__api.html#ga708ab6017d3971d9f9c0bf052fcdfd2f">XIPIPSU_ALL_MASK</a>, <a class="el" href="group__ipipsu__api.html#ga81c99cede6902a231b207281d9a6e212">XIPIPSU_IDR_OFFSET</a>, <a class="el" href="group__ipipsu__api.html#ga5c9abd1d0247d6b28268131d90b62a05">XIPIPSU_ISR_OFFSET</a>, and <a class="el" href="group__ipipsu.html#ga72bcaac2f32ad480f79204f868309c31">XIpiPsu_WriteReg</a>.</p>

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          <td class="memname">void XIpiPsu_SetConfigTable </td>
          <td>(</td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>DeviceId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_ipi_psu___config.html">XIpiPsu_Config</a> *&#160;</td>
          <td class="paramname"><em>ConfigTblPtr</em>&#160;</td>
        </tr>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Sets up the device configuration based on the unique device ID. </p>
<p>A table contains the configuration info for each device in the system.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DeviceId</td><td>Contains the ID of the device to set up the configuration for. </td></tr>
    <tr><td class="paramname">ConfigTblPtr</td><td>Device configuration structure containing required hardware build data</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A pointer to the device configuration for the specified device ID. See <a class="el" href="xipipsu_8h.html">xipipsu.h</a> for the definition of <a class="el" href="struct_x_ipi_psu___config.html" title="This typedef contains configuration information for the device. ">XIpiPsu_Config</a>.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This is for safety use case where in this function has to be called before CfgInitialize so that driver will be initialized with the provided configuration. For non-safe use cases, this is not required. </dd></dl>

<p>References <a class="el" href="struct_x_ipi_psu___config.html#a0d87ebd028051d4a05ab03410aadbc00">XIpiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_ipi_psu___config.html#a2057231c9bccf22dadbb50ae9ef93222">XIpiPsu_Config::BitMask</a>, <a class="el" href="struct_x_ipi_psu___config.html#a05cc5c627e65d8e37754913d0fc90470">XIpiPsu_Config::BufferIndex</a>, <a class="el" href="struct_x_ipi_psu___config.html#a3382d79fc242c571c9649aa91629689f">XIpiPsu_Config::IntId</a>, and <a class="el" href="group__ipipsu.html#gaf954c1864f8c4c66c0a887d8868cbc3e">XIpiPsu_ConfigTable</a>.</p>

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          <td class="memname">XStatus XIpiPsu_TriggerIpi </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_ipi_psu.html">XIpiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>DestCpuMask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Triggers an IPI to a Destination CPU. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to current IPI instance </td></tr>
    <tr><td class="paramname">DestCpuMask</td><td>Mask of the CPU to which IPI is to be triggered</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS if successful XST_FAILURE if an error occurred </dd></dl>

<p>References <a class="el" href="struct_x_ipi_psu___config.html#a0d87ebd028051d4a05ab03410aadbc00">XIpiPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_ipi_psu.html#ad9074c920ef0af4db9ea831e463d65ad">XIpiPsu::Config</a>, <a class="el" href="struct_x_ipi_psu.html#adefbfd74e9c2ee38710b9ed805504a68">XIpiPsu::IsReady</a>, <a class="el" href="group__ipipsu__api.html#ga7b5daa2f9a7fef0e3897606b491dafcc">XIPIPSU_TRIG_OFFSET</a>, and <a class="el" href="group__ipipsu.html#ga72bcaac2f32ad480f79204f868309c31">XIpiPsu_WriteReg</a>.</p>

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          <td class="memname">XStatus XIpiPsu_WriteMessage </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_ipi_psu.html">XIpiPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>DestCpuMask</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const u32 *&#160;</td>
          <td class="paramname"><em>MsgPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>MsgLength</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>BufferType</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Sends a Message to Destination. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to current IPI instance </td></tr>
    <tr><td class="paramname">DestCpuMask</td><td>Device Mask for the destination CPU </td></tr>
    <tr><td class="paramname">MsgPtr</td><td>Pointer to Buffer which contains the message to be sent </td></tr>
    <tr><td class="paramname">MsgLength</td><td>Number of messages (each message is 4bytes) </td></tr>
    <tr><td class="paramname">BufferType</td><td>Type of buffer (XIPIPSU_BUF_TYPE_MSG or XIPIPSU_BUF_TYPE_RESP)</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS if successful XST_FAILURE if an error occurred </dd></dl>

<p>References <a class="el" href="struct_x_ipi_psu___config.html#a2057231c9bccf22dadbb50ae9ef93222">XIpiPsu_Config::BitMask</a>, <a class="el" href="struct_x_ipi_psu.html#ad9074c920ef0af4db9ea831e463d65ad">XIpiPsu::Config</a>, <a class="el" href="struct_x_ipi_psu.html#adefbfd74e9c2ee38710b9ed805504a68">XIpiPsu::IsReady</a>, <a class="el" href="group__ipipsu.html#ga0b65ba4c02df42fe764615f99546fa56">XIPIPSU_CRC_INDEX</a>, <a class="el" href="group__ipipsu__api.html#ga1404a6dc6d1ff0a6baf80a74e6bdb6e5">XIpiPsu_GetBufferAddress()</a>, <a class="el" href="group__ipipsu.html#ga6191e58907dea92be1f8fd83a2673be8">XIPIPSU_MAX_MSG_LEN</a>, and <a class="el" href="group__ipipsu.html#ga60f742faef33529c730b02614441789b">XIPIPSU_W0_TO_W6_SIZE</a>.</p>

<p>Referenced by <a class="el" href="xipipsu__self__test__example_8c.html#a2dc7058c8f10506fd4279462d399d33a">IpiIntrHandler()</a>.</p>

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<h2 class="groupheader">Variable Documentation</h2>
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          <td class="memname"><a class="el" href="struct_x_ipi_psu___config.html">XIpiPsu_Config</a> XIpiPsu_ConfigTable[XPAR_XIPIPSU_NUM_INSTANCES]</td>
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<p>The IPIPSU configuration table, sized by the number of instances defined in xparameters.h. </p>

<p>Referenced by <a class="el" href="group__ipipsu__api.html#ga156d31f0b6ec62b917d9ce4a2d3684e3">XIpiPsu_LookupConfig()</a>, and <a class="el" href="group__ipipsu.html#gab4466706c8ede1b9b6e5b592a075afa7">XIpiPsu_SetConfigTable()</a>.</p>

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